?2000 integrated device technology, inc. january 2009 dsc-3090/05 1 features high-speed (equal access and cycle time) ? military: 25/45ns (max.) ? industrial: 25ns (max.) ? commercial: 15/20/25ns (max.) low power consumption battery backup operation?2v data retention voltage (idt6168la only) available in high-density 20-pin ceramic or plastic dip and 20-pin leadless chip carrier (lcc) produced with advanced cmos high-performance technology cmos process virtually eliminates alpha particle soft-error rates bidirectional data input and output military product compliant to mil-std-883, class b description the idt6168 is a 16,384-bit high-speed static ram organized as 4k x 4. it is fabricated using ldt?s high-performance, high-reliability functional block diagram a 0 address decoder 16,384-bit memory array i/o control 3090 drw 01 input data control w e c s v cc gnd a 11 i/o 0 i/o 1 i/o 2 i/o 3 , cmos technology. this state-of-the-art technology, combined with inno- vative circuit design techniques, provides a cost-effective approach for high-speed memory applications. access times as fast 15ns are available. the circuit also offers a reduced power standby mode. when cs goes high, the circuit will automatically go to, and remain in, a standby mode as long as cs remains high. this capability provides significant system-level power and cooling savings. the low-power (la) version also offers a battery backup data retention capability where the circuit typically consumes only 1w operating off a 2v battery. all inputs and outputs of the idt6168 are ttl-compatible and operate from a single 5v supply. the idt6168 is packaged in either a space saving 20-pin, 300-mil ceramic or plastic dip or a 20-pin lcc providing high board-level packing densities. military grade product is manufactured in compliance with the latest revision of mil-std-883, class b, making it ideally suited to military temperature applications demanding the highest level of performance and reliability. cmos static ram 16k (4k x 4-bit) idt6168sa idt6168la
2 idt6168sa/la cmos static ram 16k (4k x 4-bit) military, industrial, and co mmercial temperature ranges pin configurations absolute maximum ratings (1) recommended dc operating conditions recommended operating temperature and supply voltage truth table (1) dip/lcc top view capacitance (t a = +25c, f = 1.0mhz) pin descriptions 3090 drw 02 5 6 7 8 9 10 a 0 1 2 3 4 20 p20-1 d20-1 l20-1 a 1 a 2 a 3 a 4 a 5 a 6 v cc cs a 11 a 10 we g nd a 9 a 8 19 18 17 16 15 14 13 12 11 i/o 3 a 7 i/o 2 i/o 1 i/o 0 , name description a 0 - a 11 address inputs cs chip select we write enable i/o 0 - i/o 3 data input/output v cc power gnd ground 3 090 tbl 01 note: 1. this parameter is determined by device characterization, but is not production tested. symbol parameter (1) conditions max. unit c in input capacitance v in = 0v 7 pf c i/ o i/o capacitance v out = 0v 7 pf 3090 tbl 02 note: 1. h = v ih , l = v il , x = don't care mode cs we output power standby h x high-z standby read l h d out active write l l d in active 3090 tbl 03 note: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. symbol rating com'l. mil. unit v te rm terminal voltage with respect to gnd -0.5 to +7.0 -0.5 to +7.0 v t a operating te m p e r a t u r e 0 to +70 -55 to +125 o c t bias te m p e r a t u r e under bias -55 to +125 -65 to +135 o c t stg storage temperature -55 to +125 -65 to +150 o c p t power dissipation 1.0 1.0 w i out dc output current 50 50 ma 3090 tbl 04 note: 1. v il (min.) = ?3.0v for pulse width less than 20ns, once per cycle. symbol parameter min. typ. max. unit v cc supply voltage 4.5 5.0 5.5 v gnd ground 0 0 0 v v ih input high voltage 2.2 ____ 6.0 v v il input low voltage -0.5 (1 ) ____ 0.8 v 3090 tbl 05 grade temperature gnd vcc military -55 o c to +125 o c0v 5v 10% industrial -45 o c to +85 o c0v 5v 10% commercial 0 o c to +70 o c0v 5v 10% 3090 tbl 06
6.42 idt6168sa/la cmos static ram 16k (4k x 4-bit) military, industrial, and co mmercial temperature ranges 3 dc electrical characteristics (1) (v cc = 5.0v 10%, v lc = 0.2v, v hc = v cc - 0.2v) dc electrical characteristics v cc = 5.0v 10% symbol parameter power 6168sa15 6168sa20 6168la20 6168sa25 6168la25 6168sa45 6168la45 unit com'l. mil. com'l. mil. com'l. & ind. mil. com'l. mil. i cc1 operating power supply current cs < v il , outputs open v cc = max., f = 0 (2) sa 110 ____ 90 ____ 90 100 ____ 100 ma la ____ ____ 70 ____ 70 80 ____ 80 i cc2 dynamic operating current cs < v il , outputs open v cc = max., f = f max (2 ) sa 145 ____ 120 ____ 110 120 ____ 110 ma la ____ ____ 100 ____ 90 100 ____ 80 i sb standby power supply current (ttl level) cs > v ih , outputs open v cc = max., f = f max (2 ) sa 55 ____ 45 ____ 35 45 ____ 35 ma la ____ ____ 30 ____ 25 30 ____ 25 i sb1 full standby power supply current (cmos level) cs > v hc , v cc = max., v in < v lc or v in > v hc , f = 0 (2) sa 20 ____ 20 ____ 310 ____ 10 ma la ____ ____ 0.5 ____ 0.5 0.3 ____ 0.3 3090 tbl 0 7 notes: 1. all values are maximum guaranteed values. 2. f max = 1/t rc , only address inputs are cycling at f max . f = 0 means no address inputs are changing. symbol parameter test conditions idt6168sa idt6168la unit min. max. min. max. |i li | input leakage current v cc = max., v in = gnd to v cc mil. com'l. ____ ____ 10 2 ____ ____ 5 2a |i lo | output leakage current v cc = max., cs = v ih , v out = gnd to v cc mil. com'l. ____ ____ 10 2 ____ ____ 5 2a v ol output low voltage i ol = 10ma, v cc = min. ____ 0.5 ____ 0.5 v i ol = 8ma, v cc = min. ____ 0.4 ____ 0.4 v oh output high voltage i oh = -4ma, v cc = min. 2.4 ____ 2.4 ____ v 3090 tbl 0 9
4 idt6168sa/la cmos static ram 16k (4k x 4-bit) military, industrial, and co mmercial temperature ranges low v cc data retention waveform ac test conditions figure 1. ac test load figure 2. ac test load (for t chz , t clz , t whz and t ow ) *includes scope and jig capacitances data retention characteristics (la version only) v lc = 0.2v, v hc = v cc ? 0.2v 3090 drw 03 v cc cs data retention mode 4.5v 4.5v v dr 2v v ih v ih t r t cdr v dr , 3090 drw 0 4 480 ? 30pf* 255 ? d ata out 5 v 3090 drw 0 5 480 ? 5pf* 255 ? d ata out 5v input pulse levels input rise/fall times input timing reference levels output reference levels ac test load gnd to 3.0v 5ns 1.5v 1.5v see figures 1 and 2 3090 tbl 11 notes: 1. t a = +25c. 2. at v cc = 2v 3. at v cc = 3v 4. t rc = read cycle time. 5. this parameter is guaranteed by device characterization, but is not production tested. idt6168la symbol parameter test condition min. typ. (1) max. unit v dr v cc for data retention 2.0 ____ ____ v i ccdr data retention current cs > v hc v in > v hc or < v lc mil. ____ ____ 0.5 (2 ) 1.0 (3) 100 (2) 150 (3) a com'l. ____ ____ 0.5 (2 ) 1.0 (3) 20 (2) 30 (3) a t cd r (5 ) chip deselect to data retention time 0 ____ ____ ns t r (5) operation recovery time t rc (4) ____ ____ ns 3090 tbl 10
6.42 idt6168sa/la cmos static ram 16k (4k x 4-bit) military, industrial, and co mmercial temperature ranges 5 timing waveform of read cycle no. 1 (1, 2) timing waveform of read cycle no. 2 (1, 3) notes: 1. we is high for read cycle. 2. cs is low for read cycle. 3. device is continuously selected, cs is low. 3. address valid prior to or coincident with cs transition low. 4. transition is measured 200mv from steady state. ac electrical characteristics (v cc = 5.0v 10%, all temperature ranges) 3090 drw 06 a ddress data out t rc t aa t oh previous data valid data valid , t pd 3090 drw 07 data out cs t acs (4) t clz (3) t chz t pu i cc i sb supply current v cc t rc data out valid high impedance high impedance , notes: 1. 0 to +70c temperature range only. 2. ?55c to +125c temperature range only. 3. this parameter is guaranteed with ac test load (figure 2) by device characterization, but is not production tested. symbol parameter 6168sa15 (1 ) 6168sa20 (1) 6168la20 (1 ) 6168sa25 6168la25 6168sa45 (2) 6168la45 (2) unit min. max. min. max. min. max. min. max. read cycle t rc read cycle time 15 ____ 20 ____ 25 ____ 45 ____ ns t aa address access time ____ 15 ____ 20 ____ 25 ____ 45 ns t acs chip select access time ____ 15 ____ 20 ____ 25 ____ 45 ns t cl z (3 ) chip select to output in low-z 3 ____ 5 ____ 5 ____ 5 ____ ns t chz (3) chip deselect to output in high-z ____ 8 ____ 10 ____ 10 ____ 25 ns t oh output hold from address change 3 ____ 3 ____ 3 ____ 3 ____ ns t pu (3) chip sele ct to power up time 0 ____ 0 ____ 0 ____ 0 ____ ns t pd (3) chip deselect to power down time ____ 35 ____ 20 ____ 25 ____ 40 ns 3090 tbl 12
6 idt6168sa/la cmos static ram 16k (4k x 4-bit) military, industrial, and co mmercial temperature ranges ac electrical characteristics (v cc = 5.0v 10%, all temperature ranges) notes: 1. 0 to +70c temperature range only. 2. ?55c to +125c temperature range only. 3. this parameter is guaranteed with the ac load (figure 2) by device characterization, but is not production tested. symbol parameter 6168sa15 (1 ) 6168sa20 (1) 6168la20 (1) 6168sa25 6168la25 6168sa45 (2) 6168la45 (2) unit min. max. min. max. min. max. min. max. write cycle t wc write cycle time 15 ____ 20 ____ 20 ____ 40 ____ ns t cw chip select to end-of-write 15 ____ 20 ____ 20 ____ 40 ____ ns t aw address valid to end-of-write 15 ____ 20 ____ 20 ____ 40 ____ ns t as address set-up time 0 ____ 0 ____ 0 ____ 0 ____ ns t wp write pulse width 15 ____ 20 ____ 20 ____ 40 ____ ns t wr write recovery time 0 ____ 0 ____ 0 ____ 0 ____ ns t dw data to valid to e nd -o f-write 9 ____ 10 ____ 10 ____ 20 ____ ns t dh data hold time 0 ____ 0 ____ 0 ____ 3 ____ ns t whz (3) write enable to output in high-z ____ 6 ____ 7 ____ 7 ____ 20 ns t ow (3) output active from end-of-write 0 ____ 0 ____ 0 ____ 0 ____ ns 3090 tbl 13
6.42 idt6168sa/la cmos static ram 16k (4k x 4-bit) military, industrial, and co mmercial temperature ranges 7 timing waveform of write cycle no. 2 ( cs controlled timing) (1,2,5) notes: 1. we or cs must be high during all address transitions. 2. a write occurs during the overlap of a low cs and a low we . 3. t wr is measured from the earlier of cs or we going high to the end of the write cycle. 4. during this period, the i/o pins are in the output state and input signals should not be applied. 5. if the cs low transition occurs simultaneously with or after the we low transition, the outputs remain in the high impedance state. 6. transition is measured 200mv from steady state. timing waveform of write cycle no. 1 ( we controlled timing) (1,2,5) cs data in a ddress we data out 3090 drw 08 t aw t wr t dw t wc t wp t dh t whz t ow (4) t as (6) (4) (6) data valid previous data valid data valid (3) t chz (6) , t wr cs 3090 drw 09 t aw t dw data in a ddress t wc we t cw t dh as t t data valid (3) ,
8 idt6168sa/la cmos static ram 16k (4k x 4-bit) military, industrial, and co mmercial temperature ranges ordering information -- commercial & industrial xx power xxx speed xx package x process/ temperature range blank i commercial (0c to +70c) industrial (-45c to +85c) p 300mil plastic dip (p20-1) (commercial & industrial only) 15* 20 25 commercial only commercial only commercial &industrial sa la standard power low power device type 6168 speed in nanoseconds 3090 drw 10 *standard power only. xx power xxx speed xx package x process/ temperature range b military (-55c to +125c) compliant to mil-std-883, class b d l 25 45 sa la standard power low power device type 6168 speed in nanoseconds 3090 drw 10a *standard power only. 300mil ceramic dip (d20-1) 20-pin leadless chip carrier (l20-1) ordering information -- military
6.42 idt6168sa/la cmos static ram 16k (4k x 4-bit) military, industrial, and co mmercial temperature ranges 9 the idt logo is a registered trademark of integrated device technology, inc. datasheet document history 11/22/99 updated to new format pg. 8 added datasheet document history pg. 1, 2, 3, 5, 6, 8 added industrial temperature range offerings 01/07/00 pg. 1, 2, 8 revised package offerings 08/09/00 not recommended for new designs 02/01/01 removed "not recommended for new designs" corporate headquarters for sales: for tech support: 6024 silver creek valley road 800-345-7015 or ipchelp@idt.com san jose, ca 95138 408-284-8200 800-345-7015 fax: 408-284-2775 www.idt.com
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